The basic PDP-11/23+

This system is intended to learn and study the PDP-11 architecture and instruction set. So I don't plan to make it a generic system, allowing to boot from the normal storage devices like floppy or harddisk. It came with some interesting extra's which I wil add later.

The main components are also used in the PDP-11/23plus. The used configuration is in this text file

M8189 CPU
Quad sized QBUS board with F11-CPU and MMU chips. More sockets for FPU and

The configuration is described in this document. I found out the hard way that having both a 50Hz clock at the BEVNT pin and jumper J11 grounded (connected to J10), doesn't work very well for running small programs from ODT. The programs usually don't have interrupt handling, so maximum run-time is 40 ms, when the interrupt ends it all. This is the reason for the hardware console panel LTC switch.

The KDF11B M8189 is described in the Digital_Microcomputer_Products_Handbook_1985, 4.1- (p.63-). The used configuration is in this text file

M8067 RAM
Quad sized QBUS board fully populated with 81 dynamic RAM chips

This dynamic RAM board has 9 * 8 NEC4164: 256 kWord with parity. This is more than enough for running (small) programs.

Once the Boot/Diagnostics ROMs started working, it reported RAM errors:

00400000    177400   177600   FF00 FF80 > D7 bit stuck on
00400000    052525   052725   5555 55D5 > D7 bit stuck on
00420000    177400   177600   
00420000    052525   052725
With the User Guide available, this appeared to be bit 7 of row 1, IC 135. Replaced this with a NEC D4164-3 (150 ns), and the errors were gone.
Part of the board, with the replaced chip (in s low-profile socket).

M8067 MSV11-PL 9 * 8 NEC4164: 256 kWord:

M7551 RAM
Quad sized QBUS board populated with 72 dynamic RAM chips and room for another 72.

This dynamic RAM board has 18 * 4 KM41256AP: 2048 kWord and default it isn't installed.

M7551 MSV11-QB:

H9275A backplane Backside of the rack, with lots of power wires

The rack is powered with a modified standard PC-power supply. Too light for a full rack, but ok with two boards and fans (7.7 A on 5V).

The enclosure for the backplane and rack is still under construction. The main controls are routed to a custom board, providing the 50 Hz, ENABLE/HALT switch and delays for BDCOK and BPOK. A switch to disable the 50Hz to BEVTN is to be added.

The H9275-A backplane is very straight forward, with just a serpentine pattern for all slots:
image taken from the EB-23144-18_QbusIntrfs_1983.pdf document a showing serpentine slot order.

The PDP-11/23Plus front panel is wired to the backplane via a 9-pin connector. This is the routing, derived from the documentation:

H9275-A J2 to LSI-11 backplane to M8189 schematic page mapping:
----------    ----------------    --------------------
BDCOK         BA1                 M8189-0-K2, C7
BPOK          BB1                 M8189-0-K3, B6
BHALT         AP1                 M8189-0-K3, B2
BEVNT         BR1                 M8189-0-K8, A8
SRUN          AF1,AH1             M8189-0-K1, D1 

The SRUN signal might be routed to the upper Qbus slot only.

Local links:

Useful external links:

Latest update: 2023-01-30