0 error(s), 1 warning(s) unlisted in pass 1 ; Source B.E.M-SBC2X/SBC3X datasheet, page 7 BF00 RTC EQU $BF00 0000 CR EQU $00 ; RTC 0 R/W Control Register 0007 HR10 EQU $07 000D YR10 EQU $0D 000F CSRICR EQU $0F ; RTC F R/W Clock Settings Register / Interrupt Control Register ; BertMon services FF6C MCL EQU $FF6C ; return to BertMon with an LBRA FE7F CHOUTSP EQU $FE7F ; Call print SPACE FE53 PDATA EQU $FE53 ; Call print string ($00 or $04 terminated) FE1D NLPDATA EQU $FE1D ; Call print newline and string ($00 or $04 terminated) ; Read RTC into buffer and print with minimal formatting ORG $0100 0100 8603 RTIME LDA #3 ; 3 retries 0102 B7018F STA RTRTCNT ; Retry counter 0105 B6BF00 LDA RTC ; Clear DCF 0108 4F CLRA 0109 B7BF00 STA RTC ; Clear CSR ; loop init 010C 8E0006 RTIME1 LDX #6 ; 6 registers 010F 108E0000 LDY #0 ; loop action time registers, X is down counter, Y is up counter 0113 A689BF01 RTIME2 LDA RTC+1,X ; index to H10, H1, M10, M1, S10, S1 0117 8B30 ADDA #'0' 0119 A7A90190 STA TIME,Y ; Save value ; loop iterator 011D 3121 LEAY 1,Y 011F 301F LEAX -1,X ; == DEX ; loop test & branch 0121 26F0 BNE RTIME2 ; Repeat for all time registers ; register integrity check (no time register is changed during reading) 0123 B6BF00 LDA RTC ; Read Control register 0126 8408 AND #8 ; Get DCF 0128 2705 BEQ RTTDONE ; When not set, we're done 012A 7A018F DEC RTRTCNT ; When set next try 012D 26DD BNE RTIME1 ; 3 retries 012F B60193 RTTDONE LDA TIME+3 0132 84F7 ANDA #%11110111 ; mask out high bit of lower nibble 0134 B70193 STA TIME+3 0137 8603 RDATE LDA #3 0139 B7018F STA RTRTCNT ; Retry counter 013C B6BF00 LDA RTC ; Clear DCF 013F 4F CLRA 0140 B7BF00 STA RTC ; clear CSR ; loop init 0143 8E0006 RDATE1 LDX #6 ; 6 registers 0146 108E0000 LDY #0 ; loop action date registers, X is down counter, Y is up counter 014A A689BF07 RDATE2 LDA RTC+7,X ; index to y10, y1, m10, m1, 10d, 1d 014E 8B30 ADDA #'0' 0150 A7A90199 STA DATE,Y ; Save value ; loop iterator 0154 3121 LEAY 1,Y 0156 301F LEAX -1,X ; == DEX ; loop test & branch 0158 26F0 BNE RDATE2 ; Repeat for all date registers ; register integrity check (no date register is changed during reading) 015A B6BF00 LDA RTC ; Read Control register 015D 8408 AND #8 ; Get DCF 015F 2705 BEQ RTDDONE ; When not set, we're done 0161 7A018F DEC RTRTCNT ; When set next try 0164 26DD BNE RDATE1 ; 3 retries RTDDONE 0166 8D05 BSR PRTIME ; 0168 8D0A BSR PRDATE ; 016A 16FDFF LBRA MCL ; Back to monitor PRTIME 016D 8E0190 LDX #TIME ; point to time & date string 0170 17FCAA LBSR NLPDATA 0173 39 RTS PRDATE 0174 8E0197 LDX #DATE-2 ; Include century part 0177 17FCA3 LBSR NLPDATA 017A 39 RTS ORG $0180 0180 48484D4D535320 FCC 'HHMMSS CCYYMMDD' ; useful header in dump page mode H 0100 01FF 0187 434359594D4D44 018E 44 ORG $018F 018F RTRTCNT RMB 1 ; Buffer between RTC and print routine. Stores values in ASCII ORG $0190 0190 313531313030 TIME FCC '151100' ; H10, H1, M10, M1, S10, S1 0196 00 FCB 0 ; one space 0197 3230 FCC '20' 0199 323530393038 DATE FCC '250908' 019F 00 FCB 0 ORG $01A0 01A0 8D0E BSR WDATE 01A2 8D2C BSR WTIME 01A4 16FDC5 LBRA MCL ; Write date values to RTC. Stop at the 0 in the buffer ORG $01B0 WDATE 01B0 8EBF0D LDX #RTC+YR10 01B3 108E0199 LDY #DATE WDLOOP 01B7 A6A4 LDA ,Y ; Read from buffer, stop at $0 01B9 270A BEQ WDDONE 01BB 8030 SUB #'0' 01BD A784 STA ,X ; Write to RTC 01BF 301F LEAX -1,X 01C1 3121 LEAY 1,Y 01C3 20F2 BRA WDLOOP WDDONE 01C5 39 RTS ; Write time values to RTC. Stop at the 0 in the buffer ORG $01D0 WTIME 01D0 8EBF07 LDX #RTC+HR10 01D3 108E0190 LDY #TIME WTLOOP 01D7 A6A4 LDA ,Y ; Read from buffer, stop at $0 01D9 270A BEQ WTDONE 01DB 8030 SUB #'0' 01DD A784 STA ,X ; Write to RTC 01DF 301F LEAX -1,X 01E1 3121 LEAY 1,Y 01E3 26F2 BNE WTLOOP WTDONE 01E5 39 RTS ; 0 R/W Control Register ; 1 RO Tenth of seconds ; 2 R/W Units of seconds ; 3 R?W Tens of seconds ; 4 R/W Units of minutes ; 5 R/W Tens of minutes ; 6 R/W Units of hours ; 7 R/W Tens of hours ; 8 R/W Units of days ; 9 R/W Tens of days ; A R/W Units of months ; B R/W Tens on months ; C R/W Units of years ; D R/W Tens of years ; E R/W Day of week ; F R/W Clock Settings Register / Interrupt Control Register ORG $01F0 01F0 8DDE BSR WTIME 01F2 8DBC BSR WDATE 01F4 16FD75 LBRA MCL ; MM58274C datasheet, page 9: ; ;1) Disable interrupt on the processor to allow oscillator set- ; ting. Write 15 into the control register: The clock and inter- ; rupt start/stop bits are set to 1, ensuring that the clock and ; interrupt timers are both halted. Test mode and the interrupt ; register are selected. ;2) Write 0 to the interrupt register: Ensure that there are no ; interrupts programmed and that the oscillator will be gated ; onto the interrupt output. ;3) Set oscillator frequency: All timing has been halted and ; the oscillator is buffered out onto the interrupt line . ;4) Write 5 to the control register: The clock is now out of test ; mode but is still halted. The clock setting register is now ; selected by the interrupt select bit. ;5) Write 0001 to all registers. This ensures starting with a ; valid BCD value in each register. ;6) Set 12/24 Hours Mode: Write to the clock setting register ; to select the hours counting mode required. ;7) Load Real-Time Registers: All time registers (including ; Leap Years and AM/PM bit) may now be loaded in any ; order. Note that when writing to the clock setting register to ; set up Leap Years and AM/PM, the Hours Mode bit must ; not be altered from the value programmed in step 5. ;8) Write 0 to the control register: This operation finishes the ; clock initialization by starting the time. The final control reg- ; ister write should be synchronized with an external time source. ORG $0200 ; 1 Disable CPU interrupts 0200 1FA8 TFR CC, A 0202 8A10 ORA #%00010000 ; $10 0204 1F8A TFR A, CC ; clock and interrupt timers halted 0206 8EBF00 LDX #RTC ; $0F 0209 860F LDA #15 ; test mode, clock & interrupt stopped, ICR selected 020B A700 STA CR,X ; 2 oscillator gated to pin 13 020D 4F CLRA 020E A70F STA CSRICR,X ; ICR ; 3 ; Pause ; LBRA MCL ; Check 32.768 kHz at pin 13 ; 4 0210 8605 LDA #5 ; normal mode, clock & interrupt stopped, CRS selected 0212 A700 STA CR,X ; 5 0214 8601 LDA #1 ; valid BCD value 0216 8EBF01 LDX #RTC+1 ; start with tenths of second 0219 108E000E LDY #14 ; init 13 time and date registers (+1 for post-apply decrement) INITLP 021D A784 STA ,X 021F 3001 LEAX 1,X 0221 313F LEAY -1,Y 0223 26F8 BNE INITLP ; 6 0225 8601 LDA #%0001 ; normal mode, clock stop, CSR select, interrupt stop 0227 8EBF00 LDX #RTC 022A A700 STA CR,X 022C 8601 LDA #%0001 ; 24-hour mode 022E A70F STA CSRICR,X ; 7 0230 8605 LDA #%0101 ; 24-hour mode, leap + 1 0232 A70F STA CSRICR,X 0234 17FF99 LBSR WTIME ; write time buffer to RTC *** warning 1: Long branch within short branch range could be optimized 0237 17FF76 LBSR WDATE ; write date buffer to RTC ; 8 023A 8EBF00 LDX #RTC 023D 4F CLRA 023E A700 STA CR,X ; start the RTC 0240 16FD29 LBRA MCL ; 0243 8EBF01 LDX #RTC+$1 0246 108E019F LDY #DATE+6 LP 024A 8CBF0E CMPX #RTC+$E 024D 3001 LEAX 1,X 024F 313F LEAY -1,Y 0251 26F7 BNE LP 1 warning(s) in pass 2. SYMBOL TABLE CHOUTSP 00 FE7F CR 00 0000 CSRICR 00 000F DATE 02 0199 HR10 00 0007 INITLP 02 021D LP 02 024A MCL 00 FF6C NLPDATA 00 FE1D PDATA 00 FE53 PRDATE 02 0174 PRTIME 02 016D RDATE 02 0137 RDATE1 02 0143 RDATE2 02 014A RTC 00 BF00 RTDDONE 02 0166 RTIME 02 0100 RTIME1 02 010C RTIME2 02 0113 RTRTCNT 02 018F RTTDONE 02 012F TIME 02 0190 WDATE 02 01B0 WDDONE 02 01C5 WDLOOP 02 01B7 WTDONE 02 01E5 WTIME 02 01D0 WTLOOP 02 01D7 YR10 00 000D 30 SYMBOLS 0 error(s), 2 warning(s)